IBM Mainframe Forum

In the HLASM topic from last year the topic starter asked about, among other things, base registers. I'm afraid our responses, were not really appropriate, and I think I understand what the real problem with the responses was. There are two meanings for the term "base register."

• A base register as used in an instruction, which is what the responses focused on, and
• A register declared as a base register in the Assembler USING instruction that the Assembler should automatically insert into an instruction. Most of the time when the term "base register" is used, it is with this meaning.

The following tiny program specifies a base register in the second meaning above and also specifies instructions that have an explicit base register in the first meaning.

The USING Assembler instruction tells the Assembler that register 12 is a base register that has the address of the current value of the location counter.

A query the topic starter in the HLASM topic did not ask is, "How does an address get into a register in the first place?" There are a number of ways, and this list is not complete.

• Program entry
  The convention usually followed in OS/360 is that registers have this data in them when a program is entered.
  Select all

  Register  Contents
      1     Address of a parameter list
     13     Address of a register save area
     14     Address of the next instruction to
            execute when the program completed
     15     Address of the program being entered
  
  Another important convention is your program should save and restore the contents of registers 2 through 14 when it returns to the program that called your program. Register 15 is often replaced withe a return code, and it usually is not necessary to restore registers 0 and 1, though they can be used to return data for the program that called your program.
• The Branch and Link instruction
  The Branch and Link instruction normally calls another program, but when register 0 is specified as the second register, the instruction does not branch anywhere; it just stores the address of the next instruction in the first register.
• The Load Address instruction
  The Load Address instruction computes an address using the base register and displacement and stores the address in the first register.
• An address stored as data
• The GETMAIN (and others) macro instructions

Only one instruction in the example used an implicit base register: LA 13,SAVEAREA. You can specify as many base registers (second meaning) as necessary.

The Assembler is very good about figuring out which register to use in an instruction, calculating the correct displacement and storing the correct register and displacement in the instruction. It is possible for more than one declared base register to apply to one storage location. It uses the base register with the smallest displacement. If more than one base register creates a common displacement it uses the highest value register. The High Level Assembler generates a warning message when it detects this problem as this may really be an error on the part of the programmer.

Index registers

In System/360 derived computer architectures, an index register is a second register that can be specified in RX class instructions. When the computer calculates an address it adds the two registers and the displacement; in effect the addressing adder is a three input addr. You can use an index register with an implicit base register -

IC 4,ASATAB(3)

or when the base register is explicitly specified -

LA 15,0(4,3)

This Load Address instruction is a little faster than -

LR 15,3
AR 15,4
LA 15,0(,15)

Especially in the 24-bit addressing mode the Load Address instruction may be necessary because of the way the addressing addr works.

Most beginning Assembler programmers rarely, if ever, use index registers because they can only be used with RX type instructions. Many instructions do not provide index registers. For example, in the program where the LA 15,0(4,3) was used it was followed by a CLI 0(15),C' ' instruction, which does not provide for an index register.