ramkumar1992sp wrote:Thanks Steve.
I see the instruction is modified using Register RB before the TM instruction is executed.This isn't a new program.It looks like it was written in 1972.
When the TM instruction is executed,aren't we checking the contents of RB register against the mask bits of zeroes.How is the value of XXXXBITS affecting it ?
LA RC,XXXXBITS
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NEWMEET MVC XXXXBITS+1(1),1(RB)
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XXXXBITS TM 0(R5),X'00'
BC 5,SETCONFL
Thanks,
Ram Kumar
No no, and no.
When the TM instruction is executed,aren't we checking the contents of RB register against the mask bits of zeroes.How is the value of XXXXBITS affecting it ?
Register 5 is an address. 0(5) directs the machine to compute an address by adding 0 to the contents of register 5. The contents of the mask in the instruction are then used to test the contents of the storage location specified by the address.
LA RC,XXXXBITS
If register C is the program base register, as is often, though by no means always, true, the instruction is corrupting the register. The net effect is oops,
MVC XXXXBITS+1(1),1(RB)
If this instruction is actually in your program and executed, the X'00' in the TM instruction is altered with the contents of a byte in storage whose address is computed by adding 1 to the contents of register B. This was poor programming in 1972, and is still poor programming.
You really need to hire someone who actually knows Assembler to correct your program. Trying to correct it using these forums will more likely than not foul it up worse. Me? I will not add to the confusion any more!